1. Field of the Invention
The present invention is directed to the fabrication of semiconductor integrated circuits, and, particularly, to a method and apparatus for controlling an etch process endpoint employed during a shallow trench isolation planarization process by adjusting planarization shapes associated with dummy diffusion structures provided in the semiconductor IC.
2. Discussion of the Prior Art
As described herein, xe2x80x9cdiffusion shapesxe2x80x9d in a Shallow Trench Isolation (STI) manufacturing process is referred to as RX, and xe2x80x9cplanarization shapesxe2x80x9d is referred to as AB.
As known in the industry, the basic steps in a STI manufacturing process include the following: 1) RX photo -which includes a patterning step to define the shallow trench regions to be formed. Par-ticularly, as shown in FIG. 1(a), an RX photoresist layer 11 is patterned over a silicon substrate 10 covered by pad nitride films 19, to define the areas where trenches are to be formed; 2) RX etchxe2x80x94which includes etching the shallow trench regions. Particularly, as shown in FIG. 1(b), an etching process enables formation of isolation trenches 15 and large isolation trench area 15a, which, as shown, isolate active semiconductor regions 18. As shown in FIG. 1(b), a thin nitride pad layer 19 remains on top of active device active areas 18; 3) oxide deposition for filling the trench regions (e.g., using tetraethoxysilane xe2x80x9cTEOSxe2x80x9d). As shown in FIG. 1(c) oxide deposition layer 20 conforms to the surface topography; 4) AB photoxe2x80x94which includes a patterning step defining areas that are to receive AB photoresist 23, such as shown in FIG. 1(d); 5) Anneal/AB planar resist apply/Annealxe2x80x94which requires deposition of a planar resist film 25 above the AB photoresist layer 23 which has been subject to reflow anneal process as shown in FIG. 1(e); 6) AB etch 1 (photoresist) to obtain planarity for oxide layer above the trench region as shown in FIG. 1(f). It is understood that during this etch process, exposed areas of oxide enable measurable changes in gas chemistry, enabling an xe2x80x9cemission endpoint detectionxe2x80x9d; 7) AB etch 2 (oxide) for removing the oxide above the oxide layer down to the nitride layer 19 formed on top active areas 18 such as shown in FIG. 1(g); 8) Oxide chem-mech polish (xe2x80x9cCMPxe2x80x9d) which, as shown in FIG. 1(h), planarizes the device surface by removing all of the oxide layer from on top of the pad nitride layers of active regions 18; and, finally 9) a pad nitride strip which results in the completed structure comprising active areas 18 and oxide-filled isolation trenches 15 such as illustrated in FIG. 1(i).
The correct endpoint for the AB etch step (Step 7) is usually determined either by analysis of individual-wafer measurements of trench depth, oxide thickness and AB etch rate; or, by nitride emission endpoint detection. The former method is robust but measurement intensive, as variations in trench depth, TEOS thickness and AB etch time, and each of these contributions must be accounted for on a wafer-by-wafer basis.
FIG. 2 is a plot 10 depicting a typical nitride emission endpoint trace versus etch time. As shown in FIG. 2, the nitride endpoint emission signal 12 is weak and relatively flat until a point 14 is reached where the signal rapidly increases in strength indicating nearness to an etch-point limit, i.e., where the underlying nitride becomes exposed. Afterwards, the signal reaches levels off at 16 indicating the endpoint of the etch process. The latter nitride emission endpoint detection method is efficient but not robust, as some diffusion structures must be exposed in order to elicit a nitride emission endpoint signal. These diffusion structures are susceptible to AB etch and (reactive ion etch) RIE-through and to overpolish, both of which can result in defective or unreliable transfer devices.
Thus, the most difficult part of standard Shallow Trench Isolation processing is determining the correct time to stop the oxide etch. An exemplary STI etch process typically comprises a good cross-wafer uniformity for all processes; strong, repeatable emission endpoints for dry etch processes, and a uniform thickness of oxide remaining over all diffusions before chemical-mechanical (xe2x80x9cchem-mechxe2x80x9d) polishing. But these three conditions are generally not mutually compatible. That is, if oxide is to remain over the pad nitride that covers diffusions, there can be no nitride emission endpoint signal from that nitride.
It would thus be highly desirable to provide a method and apparatus for circumventing the problem of determining the AB etch endpoint by introducing into the design a sufficient quantity of xe2x80x9cdummyxe2x80x9d diffusion structures that provide a strong endpoint signal.
It is an object of the invention to provide a technique for circumventing the problem of determining the AB etch endpoint by introducing into the STI design a sufficient quantity of xe2x80x9cdummyxe2x80x9d diffusion structures with xe2x80x9cadjustedxe2x80x9d planarization that are made to provide a strong endpoint signal during normal STI fabrication.
It is a further object of the invention to provide a method for determining the AB etch endpoint by introducing into the STI design a sufficient quantity of xe2x80x9cdummyxe2x80x9d diffusion structures that provide a strong endpoint signal during normal STI fabrication and, that which endpoint signal may be controlled by adjustment of the planarization shapes associated with the dummy diffusion structures.
According to the invention, the technique comprises a step 1) of placing closely-spaced arrays of small, self-similar xe2x80x9cdummyxe2x80x9d diffusion shapes in the available xe2x80x9cwhitespacexe2x80x9d of a semiconductor design; then, a step 2) generating a set of xe2x80x9cplanarization shapesxe2x80x9d that when rendered in photoresist effectively eliminates the topography associated with the xe2x80x9crealxe2x80x9d diffusion shapes in the design; then, a step 3) associating a xe2x80x9cdummy planarization shapexe2x80x9d with each dummy diffusion shape, the dummy planarization shape being constructed so that a certain amount of topography associated with an array of dummy diffusion shapes is retained when the dummy planarization shapes are rendered in photoresist along with the shapes defined in the second step; and, a step 4) proceeding with standard STI processing, with the following modifications: i) insuring that the nominal thickness by which the deposited oxide exceeds the etched trench depth is approximately that same as the retained topography from Step 3); and, ii) terminating the oxide-etch step based on a nitride emission endpoint signal arising from the dummy diffusion shapes.